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David Brenner

==Objective==
Highly motivated, independent, and team-oriented individual looking to obtain a challenging, fulfilling career in the field of Computer Engineering related to computer architecture. Available September 2010.

==Education==
Rochester Institute of Technology
Degree: Dual BS/MS in Computer Engineering
GPA: 3.8/4.0
Awards: RIT Outstanding Undergraduate Scholar Award, Dean’s List, Tau Beta Pi Engineering Honor Society Member, RIT Computing Medal Scholarship, RIT Presidential Scholarship, Nathaniel Rochester Society Scholarship.
Master’s Thesis: Microarchitecture-level reliability enhancement of the OpenSPARC T2 Microprocessor (still in progress).
Relevant Coursework: Hardware Description Languages, Electronic Design Automation, Advanced Computer Architecture, Multiple Processor Systems, VLSI, Microelectronics, Low Power Design, Computer Science (Java, C/C++),Operating Systems, Systems Programming, Parallel Computing, Software Engineering, Data Communications and Networking, Interface and Digital Electronics, Digital Signal Processing, and Digital Control Systems.

==Work Experience==
*Intel* June – August 2008 Santa Clara, California
Undergrad Technical Intern – Ultra Mobility Group (Platform Architecture)
- Worked on Intel’s next generation ultra-low power system-on-chip mobile platform.
- Created Verilog modules used for performance analysis of interconnect generation tools to aid in the re-architecting of the next generation mobile platform.
- Evaluated interconnect generation tools, reported, and presented results back to the team.

*AMD (Advanced Micro Devices)* June – November 2007 Austin, Texas
Co-op Engineer – Floating Point Unit Verification
-Worked on Bobcat, AMD’s next generation low power, high performance, embedded microprocessor.
-Designed tools, tests, and utilities to support, ease, and increase the productivity of the functional verification of an x86 Floating Point Unit module.
-Debugged failing test cases and worked with designers to locate underlying problems and solutions.

*GE MDS (Microwave Data Systems)* November 2005 – May 2007 Rochester, New York
Intern to Wireless Systems Group – System Integrations
-Worked part time (18 hours per week) while taking full time classes at RIT.
-Integrated, configured, and tested microwave radio-based systems to meet customer expectations.

*RIT Department of Computer Science* December 2007 – February 2008 Rochester, New York
Grader – CS4 and Operating Systems
-Graded projects and labs written in C and C++ to provide feedback on the correct implementation, style, and performance issues to students.

==Projects==
Simon FPGA – Architected RTL model of the Matel electronic Simon game on a FPGA. Implemented design using VHDL and Xilinx ISE. (VHDL).

Wireless boom box – Using a Netgear router and a stereo boom box, installed Linux on the router, connected USB sound card, wired to the boom box, and configured system to automatically connect to available open wireless networks and play streaming music over the internet. (Perl, Bash, C++).

Quiz System – Designed and implemented a quiz administering system written for the RIT CS Department (Python, MySQL, LDAP, XML, JavaScript, and XHTML).

Educational Spelling Game – Led a team of three of my classmates in developing an education game intended to teach first through fifth graders how to spell (Java).

Puzzle Solver – Implemented an abstracted puzzle solver in C++ using a depth first search algorithm. Implemented three games that used the solver to determine moves for the AI (C++).

==Skills==
Operating Systems: Linux, Windows, MacOSX, Solaris.
Languages: C/C++, Java, Perl, Python, VHDL, Verilog, Assembly, Ruby, Bash, MATLAB.
Experience with: Synopsys, Cadence, and Mentor Graphics EDA/CAD tools, SimpleScalar, HotSpot, HSPICE, CVS, SVN, Git.

==Leadership and Volunteer Experience==
President (2009) Vice-President (2008), and Secretary (2007) of NY-Pi Chapter of Tau Beta Pi Engineering Honor Society, Chairman of RIT Computer Science House (2007), IEEE Member, Eagle Scout.

==Citizenship==
United States.